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ASIC Verification Engineer,

ASIC Verification Engineer,

MosChip Semiconductor Technology Ltd

Electronics , Project Management

Hyderabad,Telangana Post Date Mar, 08 2019 Age Range 27 To 32 Annual CTC ( 3 - 5 Lacs ) ( Experience: 3-8 Years )


ASIC Verification Engineer, MosChip Semiconductor Technology Ltd 3 - 8 yrs Bengaluru, Hyderabad


  • Skill - Design Verification

Job Description

  • We are looking for ASIC verification engineers and job description is as below : Skill - Design Verification Experience: 3 to 15 years No of Positions : 15 Job location: Hyderabad/Bangalore Skill: System Verilog /OVM/UVM Job Description  strong background in logic verification with a good understanding of logic design concepts  Expertise in Verilog*, System Verilog*, UVM*/AVM*/OVM*, Perl scripting, and VCS* simulator  experience has to be in the field of emulation  Logic design skills and thorough understanding at gate level  Strong experience in debugging at the system level Strong understanding of Register Transfer Level (RTL) design, both at the logic level (RTL)  Expertise in functional coverage concepts/implementation  Strong experience with testplan/testbench and test writing/debug  Working knowledge of UNIX*, and Windows* If interested help with your updated profile along with the below details
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